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Antistatic discharge method PCB design brief time
Release time:2014-05-26   Click times:1748

PCB board designs, can be layered, proper layout and installation to achieve ESD immunity PCB design. By adjusting the PCB layout can be a good guard against ESD. * Whenever possible, use a multi-layer PCB, with respect to the double-sided PCB, the ground and power planes, and the closely arranged signal lines - ground spacing can reduce common-mode impedance and inductive coupling, so as to achieve double-sided PCB 1 / 10 to 1/100. For the top and bottom surfaces of both components, with a short cable.

From the human body, the environment and even electronic equipment within the static precision for semiconductor chips can cause a variety of injuries, such as through the internal components of the thin insulating layer; damaged gate of the MOSFET and CMOS components; CMOS devices trigger lock ; short-circuit reverse bias PN junction; short-circuit forward-biased PN junction; melting active devices inside the welding wire or aluminum. In order to eliminate electrostatic discharge (ESD) of the electronic device interference and sabotage, require a variety of technical means of prevention.

PCB board designs, can be layered, proper layout and installation to achieve ESD immunity PCB design. In the design process, it can be predicted by design changes limited to changes in the vast majority of components. By adjusting the PCB layout can be a good guard against ESD. Here are some common precautions.

* Whenever possible, use a multi-layer PCB, with respect to the double-sided PCB, the ground and power planes, and the closely arranged signal lines - ground spacing can reduce common-mode impedance and inductive coupling, so as to achieve double-sided PCB 1 / 10 to 1/100. Try a signal to each layer are close to a power supply layer or ground layer. For the top and bottom surfaces of both components, with a short cable, and many places filled with high density PCB, consider using the inner line.

* For double-sided PCB is to use tightly woven power and ground grid. Power line close to the ground, between the vertical and horizontal lines or fill area, as much as possible to the connection. One side of the grid size is less than equal to 60mm, if possible, the grid size should be less than 13mm.

* Ensure that each circuit as compact as possible.

* As far as possible all the connectors are put aside.

* If possible, the power cable from the central card is introduced, and stay away from affected areas directly affected by ESD.

* In the lead outside of the chassis connector (easily hit directly by ESD) on all PCB layers below, to be placed wide chassis ground or filled polygon, the distance and approximately every 13mm hole used to connect them together .

* Place the mounting holes on the edge of the card, with unimpeded around the mounting hole solder pads connected to the top and bottom of the chassis ground.

* When the PCB assembly, not any solder coating on the top or bottom of the pad. Having a built-in washers to achieve the PCB and the metal chassis / shield or ground plane in close contact with the stent.

* Between each layer of the chassis ground and circuit ground, to set the same "Quarantine"; if possible, keep the separation distance of 0.64mm.

* The top and bottom mounting hole location near the card every 100mm along the chassis ground circuit and chassis ground connected together with a line width of 1.27mm. These connection points adjacent to, and in between the chassis ground circuit pad or placing mounting holes for mounting. The ground connection can be cut open with a blade to keep open, or beads / high frequency capacitance jumper.

* If the board will not be placed in a metal box or shielding device, the board of the top and bottom of the chassis ground wire solder resist can not be painted, so that they can be used as ESD arc discharge electrode.

* To set up in the following manner in a ring around the circuit to:

(1) In addition to the edge connector and chassis ground, put a ring around the periphery of the entire path to ground.

(2) to ensure that the annular layer is greater than the width of all 2.5mm.

(3) every 13mm hole used to connect the ring together.

(4) the ring with the public to multilayer circuits connected together.

(5) mounted on a metal chassis or shielding device in dual-panel, it should be linked with the ring circuit common ground. Unshielded annular sided circuit

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